Design of Transistors Using High-permittivity Materials

Abstract

Two-dimensional semiconductors could be used as a channel material in low-power transistors, but the deposition of high-quality, ultrathin high-κ dielectrics on such materials has proved challenging. In particular, atomic layer deposition typically leads to non-uniform nucleation and island formation, creating a porous dielectric layer that suffers from current leakage, particularly when the equivalent oxide thickness is small. Here, we report the atomic layer deposition of high-κ gate dielectrics on two-dimensional semiconductors using a monolayer molecular crystal as a seeding layer. The approach can be used to grow dielectrics with an equivalent oxide thickness of 1 nm on graphene, molybdenum disulfide (MoS₂) and tungsten diselenide (WSe₂). Compared with dielectrics created using established methods, our dielectrics exhibit a reduced roughness, density of interface states and leakage current, as well as an improved breakdown field. With the technique, we fabricate graphene radio-frequency transistors that operate at 60 GHz, and MoS₂ and WSe₂ complementary metal–oxide–semiconductor transistors with a supply voltage of 0.8 V and subthreshold swing down to 60 mV dec⁻¹. We also create MoS₂ transistors with a channel length of 20 nm, which exhibit an on/off ratio of over 10⁷.

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Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author on reasonable request.

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Acknowledgements

This work is supported by National Natural Science Foundation of China grants 61734003, 61521001, 61851401, 51861145202, 61861166001, 11874199 and 21872100; National Key Basic Research Programme of China grants 2015CB921600 and 2015CB654901; Natural Science Foundation of Jiangsu Province grants BK20170005; Singapore MOE grant R143-000-A43-114; Programme A for Outstanding Ph.D. candidate of Nanjing University 201801A013; Postgraduate Research & Practice Innovation Programme of Jiangsu Province KYCX18_0045; Strategic Priority Research Programme of Chinese Academy of Sciences XDB 30000000; a Grant-in-Aid for JSPS Research Fellows from the JSPS KAKENHI; the JSPS A3 Foresight Programme and JSPS KAKENHI grants JP19H00755 and 19K21956, Japan; Key Laboratory of Advanced Photonic and Electronic Materials, Collaborative Innovation Centre of Solid-State Lighting and Energy-Saving Electronics, and the Fundamental Research Funds for the Central Universities, China.

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Author notes

These authors contributed equally: Weisheng Li, Jian Zhou, Songhua Cai.

Affiliations

National Laboratory of Solid State Microstructures, School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, China

Weisheng Li, Jian Zhou, Zhihao Yu, Ke Yan, Ningxuan Dai, Xiangjin Wu, Huijuan Zhao, Zixuan Wang, Daowei He, Lijia Pan, Yi Shi & Xinran Wang
National Laboratory of Solid State Microstructures, Jiangsu Key Laboratory of Artificial Functional Materials, College of Engineering and Applied Sciences and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, China

Songhua Cai, Taotao Li & Peng Wang
Department of Chemistry, National University of Singapore, Singapore, Singapore

Jialin Zhang & Wei Chen
Department of Materials Engineering, University of Tokyo, Tokyo, Japan

Nan Fang & Kosuke Nagashio
Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Device Institute, Nanjing, China

Yun Wu & Tangsheng Chen
School of Chemistry and Chemical Engineering, Nanjing University, Nanjing, China

Xiaoyu Xie & Haibo Ma
Department of Chemistry and Biochemistry, University of California, Los Angeles, CA, USA

Daowei He & Xiangfeng Duan

Contributions

X. Wang conceived and supervised the project. W.L., J. Zhou, Z.Y., N.D., X. Wu., H.Z., D.H., Y.S. and X.D. contributed to sample preparation, characterization, device fabrication, measurements and data analysis. S.C. and P.W. performed TEM and data analysis. J. Zhang and W.C. performed STM and data analysis. N.F. and K.N. performed D _it analysis. T.L. and Z.W. performed CVD sample growth and transfer. Y.W. and T.C. contributed to RF transistor fabrication, measurements and data analysis. X.X. and H.M. performed molecular dynamics simulations. K.Y. and L.P. performed water contact-angle measurement. W.L., Z.Y., P.W. and X. Wang wrote the manuscript with input from other authors. All authors contributed to discussions.

Corresponding authors

Correspondence to Peng Wang or Xinran Wang.

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Li, W., Zhou, J., Cai, S. et al. Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices. Nat Electron 2, 563–571 (2019). https://doi.org/10.1038/s41928-019-0334-y

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Received: 15 August 2019
Accepted: 30 October 2019
Published: 09 December 2019
Issue Date: December 2019
DOI : https://doi.org/10.1038/s41928-019-0334-y